1. Field of the Invention
The present invention relates to the field of driving circuit and, more particularly, to a switchable voltage follower and a bridge driver that utilizes the voltage follower.
2. Description of Related Art
FIGS. 8A and 8B show a conventional pulse width modulation (PWM) bridge driver and its driving waveforms, respectively. As shown in the figure, the PWM up (PWM-UP) signal and PWM down (PWM-DOWN) signal are applied to the cross-connected transistors MP1, MN1, MP2 and MN2 to drive a speaker for being transformed into an audio output by the low pass filtering characteristic of the speaker. The structure of such a bridge driving amplifier is quite simple and can operate with a low voltage to produce an output with a relatively large volume. However, as the voltage supply VDD swings, the variation of the output volume is quite large. When the voltage supply VDD is high, the output current is large, and thus a large transient noise is easy to be produced in the integrated circuit, which is likely to result in malfunctions of the integrated circuit, for example, erroneously trigging the power on reset. In addition, because the layout of the transistors MP1, MN1, MP2 and MN2 may not be symmetric, or the conducting resistance of the transistors MP1 and MN1 may be different from that of the transistors MP2 and MN2 due to the drift of the process, an asymmetric distortion will be encountered.
FIG. 9 illustrates a bridge amplifier used in an audio processing integrated circuit to drive a speaker, wherein the data (b0xcx9cb10) output from a digital audio processing circuit is transformed into analog signal by a digital to analog converter 91 (DAC). Then, the analog signal is converted by a single ended to differential output converter 92 to a positive signal V1 and a negative signal V2 to drive two class AB amplifiers 93 and 94, uses as drivers, respectively. These two drivers thus output audio driving signal for driving the speaker 95.
The circuit structure of the aforementioned single ended to differential output converter 92 and two class AB amplifiers 93 and 94 of the bridge amplifier is illustrated in FIG. 10. The advantage is such that the circuit can drive the speaker in single ended configuration, or the circuit can be set in bridge configuration to drive the speaker with four-time output power. However, the single ended to differential output converter 92 will produce an offset, and thus the two operational amplifiers OPU and OPB in the two class AB amplifiers 93 and 94 are likely to cause a DC offset. Such a DC offset will apply a DC component to the speaker 95, and cause an extra consumption of static current. As a result, there is encountered a problem in having an over-large DC offset at the bridge output (SPK+, SPKxe2x88x92).
Moreover, the product of the static bias current of the transistors MN1 and MP1 of the class AB amplifiers 93 and 94 in the aforementioned bridge amplifier and the resistance of the speaker must be greater than the DC offset of the bridge output (SPK+, SPKxe2x88x92); otherwise, there will be a crossover distortion. Such a distortion is suppressed by the feedback of the bias control circuit 96 (a detained description of such can be found in U.S. Pat. No. 4,963,83). However, because the bias control circuit 96 is used to provide negative local feedback, the open loop gain of the class AB amplifier will be lowered by 10xcx9c20 times. Therefore, the amount of feedback is not large enough to suppress the crossover distortion. FIG. 11 shows the input waveform VIN of the bridge amplifier and output waveform (VSPK+xe2x88x92VSPKxe2x88x92) of the bridge output (SPK+, SPKxe2x88x92), which depicts that there is an obvious crossover distortion in the bridge output waveform (VSPK+xe2x88x92VSPKxe2x88x92). Accordingly, there is a need for the above conventional bridge amplifier to be improved.
The object of the present invention is to provide a switchable voltage follower and a bridge driver using the same for mitigating and/or obviating the problems in the conventional skill.
In accordance with one aspect of the present invention, there is provided a switchable voltage follower, which comprises: an output transistor pair having a PMOS transistor and a NMOS transistor, each having a drain connected together for being used as a driving output terminal; a first, a second and a third switching devices, each having a first input terminal, a second input terminal and an output terminal, the first input terminal of the second switching device being connected to a voltage supply, the output terminal of the second switching device being connected to a gate of the PMOS transistor, the second input terminal of the third switching device being connected to a system low voltage, the output terminal of the third switching device being connected to a gate of the NMOS transistor; and an operational amplifier having a positive input connected to the driving output terminal, a negative input connected to the output terminal of the first switching device, and an output connected to the second input terminal of the second switching device and the first input terminal of the third switching device, wherein, each of the switching devices is controlled by a polarity terminal in such a manner that, when the polarity terminal is in a first logic state, the output terminal of each switching device is connected to its first input terminal, and when the polarity terminal is in a second logic state, the output terminal of each switching device is connected to its second input terminal.
In accordance with another aspect of the present invention, there is provided with a bridge driver having a first and a second switchable voltage followers. Each switchable voltage follower comprises: an output transistor pair having a PMOS transistor and a NMOS transistor, each having a drain connected together for being used as a driving output terminal; a first, a second and a third switching devices, each having a first input terminal, a second input terminal and an output terminal, the first input terminal of the second switching device being connected to a voltage supply, the output terminal of the second switching device being connected to a gate of the PMOS transistor, the second input terminal of the third switching device being connected to a system low voltage, the output terminal of the third switching device being connected to a gate of the NMOS transistor, the first and second input terminals of the first switching device being provided as an input low terminal and an input high terminal, respectively, wherein each of the switching devices is controlled by a polarity termonal in such a manner that, when the polarity terminal is in a first logic state, the output terminal of each switching device is connected to its first input terminal, and when the polarity terminal is in a second logic state, the output terminal of each switching device is connected to its second input terminal; and an operational amplifier having a positive input connected to the driving output terminal, a negative input connected to the output terminal of the first switching device, and an output connected to the second input terminal of the second switching device and the first input terminal of the third switching device, wherein, the input low terminals of the first and second switchable voltage followers are connected together for being used as a voltage input low terminal; the input high terminals of the first and second switchable voltage followers are connected together for being used as a voltage input high terminal; the polarity terminals of the two switchable voltage followers are inputted with a polarity switching signal and an inverse polarity switching signal, respectively.
Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.